How FlexSPI talks to a QSPI NOR on the i.MX RT1062: the two access paths, the LUT, the sampling clock that caps your frequency, and how to prove you run at full speed. Read speed is checked against the bus, write speed against the flash datasheet.
Five lessons from taking an i.MX RT control unit from first boot toward production: the bootloader that hides your SDRAM setup, the flash size nobody measured, writing the flash you execute from, firmware updates as a protocol, and surviving the power cut.
Secure boot on the i.MX RT10xx is a sequence of one-way steps. A production checklist in the order that avoids bricking boards: trust boundary, keys, signing, testing on an open part, fusing the SRK hash, encrypted XIP, closing the part, and locking debug.
What each IOMUXC pad-control field on the i.MX RT10xx actually does, how to derive its value from the schematic and the protocol spec instead of trusting generated defaults, and a microSD interface as a worked example.
GPIO, ADC and FlexPWM interrupts follow one NVIC pattern but differ in where the trigger lives and how the flag clears. Plus the audit that matters with FreeRTOS: which ISRs sit above the syscall barrier, and therefore must never touch a FreeRTOS API.
What it takes in firmware to run a daisy chain of devices over Single Pair Ethernet: which port decides that the controller is gone, how a node learns its position, when to store the topology, why the receive interrupt lies, and how to update every device on the chain.